The Area-Time Complexity of the VLSI Counter

This paper is a modification of a result of Codenotti and Lotti [2]. They studied the area-time complexity of an n-bit VLSI counter in the synchronous VLSI model (see [1]). They proved a lower bound AT 2= fl(n log n) and proposed a circuit of complexity AT 2-O(n log4n). This circuit satisfied the property that all I / O ports lay on the border of the circuit. Henceforth, we shall call the synchronous model with I / O ports on the border the boundary model. In the synchronous model, Thompson and Yasuura [4] showed a VLSI counter of complexity A T 2 = O( n log2n). Their circuit was part of the ~selector. We prove that the above lower bound can be improved to fl(n log2n) in the boundary model and propose a circuit of complexity O(n log3n log log n). In the synchronous model we show a circuit satisfying AT 2 -O(n log n log21og n). 2.1. Definition. Given a boolean function y = f(x), where x ( X l , x2 , . . . ,xn) is a boolean vector, we say that y is functionally dependent on x i if there exist two boolean vectors x', x", that differ only in the ith component, such that f(x') ~ fix").